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@@ -50,30 +50,34 @@ inline const uint8_t PANEL_579C_GDEY0579F51_SELECT_SLAVE[] = {0x02};
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inline const uint8_t PANEL_579C_GDEY0579F51_SELECT_BOTH[] = {0x00};
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inline const uint8_t PANEL_579C_GDEY0579F51_PSR_MASTER[] = {0x03, 0x29};
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inline const uint8_t PANEL_579C_GDEY0579F51_PSR_SLAVE[] = {0x07, 0x29};
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-inline const uint8_t PANEL_579C_GDEY0579F51_BTST[] = {0x32, 0x32, 0x32, 0x32};
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+inline const uint8_t PANEL_579C_GDEY0579F51_BTST[] = {0x38, 0x38, 0x38, 0x00};
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inline const uint8_t PANEL_579C_GDEY0579F51_TRES[] = {0x01, 0x8C, 0x01, 0x10}; // 396x272 - one region's resolution
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inline const uint8_t PANEL_579C_GDEY0579F51_CDI_INIT[] = {0x97};
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inline const uint8_t PANEL_579C_GDEY0579F51_E9[] = {0x01};
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inline const uint8_t PANEL_579C_GDEY0579F51_E0[] = {0x01};
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-// _InitDisplay(): PSR written to each side individually (master and slave
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-// scan in mirrored directions, hence different first PSR byte - 0x07 vs
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-// 0x03), then BTST/TRES/CDI/E9/E0 written once under select=Both since
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-// they're genuinely shared/global registers, then re-select master ready
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-// for the first region's window-set.
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+// Init(), following Waveshare's own epd5in79g.cpp exactly (command order
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+// and select state matter here, not just which bytes get sent): PSR
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+// written to each side individually, then CDI/TRES/BTST/E9/E0 written
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+// once under select=Both since they're genuinely shared/global registers
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+// - and, critically, POWER-ON (0x04) is sent while select is STILL Both,
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+// not re-selecting master first. This engine's first attempt added an
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+// extra "reselect master" step before 0x04 that Waveshare's reference
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+// does not have, meaning only master's chip was ever actually powered on
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+// - a very plausible explanation for slave showing a persistent noise/
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+// garbage artifact regardless of what data it's given (2026-09-19).
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inline const EpdCommand PANEL_579C_GDEY0579F51_INIT[] = {
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{0xA2, PANEL_579C_GDEY0579F51_SELECT_MASTER, 1},
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{0x00, PANEL_579C_GDEY0579F51_PSR_MASTER, 2},
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{0xA2, PANEL_579C_GDEY0579F51_SELECT_SLAVE, 1},
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{0x00, PANEL_579C_GDEY0579F51_PSR_SLAVE, 2},
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{0xA2, PANEL_579C_GDEY0579F51_SELECT_BOTH, 1},
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- {0x06, PANEL_579C_GDEY0579F51_BTST, 4},
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- {0x61, PANEL_579C_GDEY0579F51_TRES, 4},
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{0x50, PANEL_579C_GDEY0579F51_CDI_INIT, 1},
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+ {0x61, PANEL_579C_GDEY0579F51_TRES, 4},
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+ {0x06, PANEL_579C_GDEY0579F51_BTST, 4},
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{0xE9, PANEL_579C_GDEY0579F51_E9, 1},
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{0xE0, PANEL_579C_GDEY0579F51_E0, 1},
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- {0xA2, PANEL_579C_GDEY0579F51_SELECT_MASTER, 1},
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- {0x04, nullptr, 0, /*delay_before_ms=*/0, /*delay_after_ms=*/0, /*wait_busy_after=*/true}, // power on
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+ {0x04, nullptr, 0, /*delay_before_ms=*/0, /*delay_after_ms=*/0, /*wait_busy_after=*/true}, // power on, select=Both
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};
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// _setPartialRamAreaMaster/Slave(0, 0, 396, 272), default partial_mode=true
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